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JPS5791553A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device

Assignee: Toshiba Corp
•
Filing: 1980-11-29
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Granted: —
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Expires: 2000-11-29
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Abstract

Abstract PURPOSE: To enable the microminiaturization of a well layer formed in a semiconductor substrate at the boundary of the well layer by forming a high density diffused layer in the boundary of the well layer in a C-MOS structure, thereby preventing the decrease in the punch-through withstand voltage between the substrate and the well. CONSTITUTION: A resist film 25 having a hole is covered on a part in the vicinity of a boundary A on a P type well 23 on an N type Si substrate 21 formed with the well 23, ions are implanted with the film 25 as a mask, and a P type region 26 having a density higher than the well 23 is formed. Thereafter, inversion preventive layers 30, 31 are formed with an ordinary method, and a thick oxidized film 32 is formed thereon. In this state, an N-channel MOS is formed on a P type well 23, a P channel MOS is formed on the substrate 21, is wired with an aluminum layer 42 to form a C-MOS. Since high density P type layer 26 is disposed between the N + type drain region 38 and the substrate 21, the extension of a depletion layer is suppressed, thereby improving the punch-through withstand voltage. The element can be formed that much in the vicinity of the boundary. COPYRIGHT: (C)1982,JPO&Japio

Inventors

  • 👤 Takeo Kondo

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 12:10
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/102; H10D62/112; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/858; H10W; H10W10/00; H10W10/01; H10W10/031; H10W10/30

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