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JPS5780871A Expired / Lapsed JP ⏱️ 0.0 years remaining

Video signal binary circuit in photoelectric conversion system

Assignee: Hitachi Ltd
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Filing: 1980-11-08
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Granted: —
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Expires: 2000-11-08
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Abstract

Abstract PURPOSE:To prevent a white part in a black picture to obtain accurate picture information, by inhibiting a down clock, which lowers the peak value of a video signal, when this peak value is lowered to a certain voltage level. CONSTITUTION:The peak value level from an output terminal of a video signal binary LSI 21 is inputted to the - terminal of a comparator 22, and a level voltage divided by resistances is inputted to the + terminal. When the peak value voltage is lower than the comparison voltage, the comparator 22 outputs an H- level output to the output terminal. The output of the comparator 22 is inputted to one input of an OR circuit 23, and a down clock signal is inputted to the other input to inhibit the down clock for the H-level output of the comparator 22. Thus, the peak value is prevented from being lowered more than the comparison voltage to secure the black picture.

Inventors

  • 👤 Hiromitsu Momoki
  • 👤 Yasuo Inoue
  • 👤 Takahisa Ikeda

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 23:39
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/40; H04N1/403

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