Voltage boosting circuit

Abstract

Abstract PURPOSE:To obtain the four-value level output voltage for the subject circuit by a method wherein three kinds of control pulse signals are inputted to the circuit consisting of an FET, an inverter, three capacitors and a battery. CONSTITUTION:The FET's 5-12 and the inverters IN1-IN4 consists of LSI's (surrounded by a dotted line A as shown in the diagram). Between terminals T1 and T2, a battery is connected as a power source, and capacitors 2-4 are connected between terminals T3 and T4, terminals T5 and the ground, and the terminal T6 and the ground. A pulse signal C1 of a fixed frequency is inputted in a terminal T7, a pulse signal C2 of the frequency twice as many as that of the pulse signal C1 is inputted in a terminal T8. and a pulse signal C3 of the phase which is delayed one half frequency for the pulse signal C2 is inputted to a terminal T9. The capacitors 2-4 are connected to a power source 1 and other capacitors successively at the prescribed timing, thereby enabling to obtain negative voltage, which is dropped successively, for the terminals T1, T2, T5 and T6.

Inventors

• 👤 Kazufumi Usui

Bibliographic Details