Phose absorbing circuit

Abstract

Abstract PURPOSE:To make a circuit into an IC, by constituting the circuit by a register file, where data is read and written simultaenously by addresses independent of each other, and address counters for read and write using gray counters. CONSTITUTION:A timing extracting circuit T extracts a clock from phase delayed data inputted to an input terminal 1. An address counter 22 for write is operated by this clock, and the input signal is written on the address of a memory 21 for register file designated by the counter 22. An address counter 23 for read is operated by a clock for read inptted to an input terminal 3, and input data is read out to an output terminal 2 from theaddress of the memory 21, which is designated by the counter 23, by a clock without phase delay. For the purpose of avoiding simultaneous read and write for the same address, outputs of counters 22 and 23 are compared with each other by a coincidence detecting circuit 24, and the counter 23 is stopped temporarily if they coincide with each other.

Inventors

• 👤 Masanori Kajiwara
• 👤 Michinobu Ohata
• 👤 Koji Mizushima
• 👤 Osamu Uechi

Bibliographic Details