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JPS5773578A Expired / Lapsed JP ⏱️ 0.0 years remaining

Television receiver

Assignee: Sony Corp
•
Filing: 1980-10-27
•
Granted: —
•
Expires: 2000-10-27
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Abstract

Abstract PURPOSE:To reproduce a desired picture plane as a still picture at all times, by always inputting past several pictures to memories and fetching the past picture before the trigger in the instant when the trigger is incoming. CONSTITUTION:When a signal S4 in synchronizing with a vertical synchronizing signal Sv via an AND circuit 26 is sequentially applied to a page counter 21, the output signal is applied to a decoder 23, memories 51-54 are switched and a video signal inputted through an A-D conversion circuit 4 is written in at each field, and the written-in information in the past is renewed with new information. At a desired time, when a trigger switch 11 is depressed with a memory 53, e.g., written in the information, a signal S2 becomes a low level and the mode is switched to a readout mode. On the other hand, one page counter 21 clock signal is outputted to advance the memory by one, the information of the memory 54 before three fields, it is converted into an analog signal at an D-A conversion circuit 16 for transmission.

Inventors

  • 👤 Masayuki Suematsu
  • 👤 Hisao Mogi
  • 👤 Ikuo Someya

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 02:03
CPC Classifications
H; H04; H04N; H04N7/00; H04N7/025

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS54137221A Cited

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