Output stablizing circuit for focus detector

Abstract

Abstract PURPOSE:To perform displaying of a focusing state and the like stably with high accuracy by storing and holding the past state of the signal corresponding to the focusing state, and changing the methods of generation and displaying of the signal according to the combinations of this and fresh signals, with respect to information processing of imaging states of solid-state image sensors and image pickup tubes. CONSTITUTION:In a flicker suppressing circuits FS, the signals of front focus, focusing, and rear focus are outputted from a CPU at every one scanning of a focus detector CCD applying a solid-state image sensor. These signals are inputted to a DFF, and the moment when they are outputted from the CPU, they are inputted to an ROM then inputted to the DFF2 of the next stage by the signal from a timing generator TMGE. In this way, the latest data, the data one time before-data (n-1) times before are transferred in DFF1-DFFn by the timing signals from the TMGE, and in the same manner these data are inputted to the ROM, from which the output data corresponding to their contents are fed to a post-connected display circuit DISP. With such constitution, the displaying of the focusing state or the like is accomplished stably with high accuracy.

Inventors

• 👤 Shinji Sakai
• 👤 Nobuhiko Shinoda
• 👤 Mitsuya Hosoe
• 👤 Takao Kinoshita

Bibliographic Details