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JPS5753899A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor storage device

Assignee: Toshiba Corp
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Filing: 1980-09-17
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Granted: —
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Expires: 2000-09-17
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Abstract

Abstract PURPOSE:To realize the relief for a writing defective bit, by storing the address information of a defective bit to which a writing defect is caused at a P-ROM into a redundant P-ROM. CONSTITUTION:When an output signal O1 is set at ''0'' at the moment the writing is carried out to a P-ROM11, a redundant P-ROM12 is made active. Then the address information ''1'', i.e., address signals A0=0 and A1=1 are written. Thus the ROM12 stores the address information of a defective bit plus the information showing that the ROM12 is active. After this, a detecting circuit 13 works by the active information output AC given from the ROM12 when the information of address ''1'' of the ROM11 is read. Then a coincidence detection signal of the output of the circuit 13 is transmitted to a clamping circuit 17 to obtain an output of ''1'' level at an output terminal OUT.

Inventors

  • 👤 Junichi Miyamoto

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 18:15
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/70; G11C29/78

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