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JPS5752174A Expired / Lapsed JP ⏱️ 0.0 years remaining

Multigate field effect transistor

Assignee: NEC Corp
•
Filing: 1980-09-16
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Granted: —
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Expires: 2000-09-16
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Abstract

Abstract PURPOSE:To improve the nutual conductance of a multigate field effect transistor having a plurality of gate electrodes on a compound semiconductor layer by reducing the thickness of a semiconductor layer positioned directly under the gate at least one. CONSTITUTION:An N type epitaxial active layer 43 having 1.10<17>cm<-3> of carrier density and approx. 0.3mum of thickness is formed through a buffer layer 42 on a semi-insulating GaAs semiconductor substrate 41 added with Cr. Then, regions 44, 45 are etched on the layer 43 to form stepwise difference, Schottky metal, e.g., aluminum is deposited in the thickness of approx. 5,000Angstrom , is then patterned, and the first and second gates 46, 47 of approx. 1.0mum of gate length are formed. When the thickness of the layer 43 directly under the first gate 46 is formed thinner than that directly under the second gate 47, a bigate field effect transistor having high mutual conductance even if positive bias is not applied to the gate can be obtained.

Inventors

  • 👤 Yoshito Ogawa

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 19:06
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/87; H10D30/873

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5036081A Cited
JPS54148385A Cited

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