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JPS5752126A Expired / Lapsed JP ⏱️ 0.0 years remaining

Compound semiconductor device

Assignee: Oki Electric Industry Co Ltd
•
Filing: 1980-09-16
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Granted: —
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Expires: 2000-09-16
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Abstract

Abstract PURPOSE:To perform the complete matching of lattice constant in a compound semiconductor device by forming two types of Si, Ge and GaAs, P transition layer varying in tapered state in composition ratio between the crystal of a substrate and a compound semiconductor active layer. CONSTITUTION:The first and second transition layers 4, 5 are sequentially formed on the surface of an Si substrate 3, with Si, Ge of composition in such a manner that the ingredient ratio of Ge is 0 on the surface of the substrate and increases as the thickness of the transition layer increases in a tapered component configuration and the second transition layer 5 contains GaP and GaAs as mixed crystal, the quantity of GaP is reduced in tapered state and is 0 on the outermost surface in the component configuration. Since the complete matching of the lattice constant can be performed in the boundary in this manner, a grown layer of high quality can be obtained, and a semiconductor device having high function and performance can be obtained without fine cracks or the like defect.

Inventors

  • 👤 Yasuhiro Ishii
  • 👤 Noriyuki Shimano
  • 👤 Yoshimoto Fujita

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 00:46
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/34; H10P14/3402; H10P14/3414; H10P14/3421; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/32; H10P14/3202; H10P14/3204; H10P14/3211; H10P14/3214; H10P14/3218; H10P14/3221; H10P14/3242; H10P14/3244; H10P14/3254; H10P14/3418

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