Sequence controller

Abstract

Abstract PURPOSE:To retrieve a failure in logical operation automatically by retrieving output instructions from a prescribed sequence circuit, by fetching the contents of an arithmetic register which has just finished executing the last instruction and those of input and output circuits, and by discriminating the logic of output conditions. CONSTITUTION:Under the control of a micro(mu)-computer 20 equipped with a storage device 22 stored with a muPG for retrieval control, mu processor 21, display part 23, and operation part 24, a sequence (SQ) controller 1 equipped with input and output circuits 2 and 3 for SQ control, a temporary storage register (RG)4, an SQ arithmetic control part 5, an arithmetic RG7, an SQ program (PG) storage device 8, a PG counter 6, etc., changes switching circuits 11-14 over to sides S with a signal from a timing generating circuit 15 during the retrieval of the SQ circuit. According to the PG from the device 8, an output instruction from the prescribed SQ circuit is retrieved and after the last instruction is executed, the contents of the RG7 and those of the circuits 2 and 3 are fetched; when the logic of the RG7 is 1, output requirements are considered to be met to stop the retrieval, and when 0, the output requirements are condiered not to be met to execute and discriminate the further last instruction.

Inventors

• 👤 Hiroshi Kitano

Bibliographic Details