Programmable logic array device

Abstract

Abstract PURPOSE:To remarkably reduce the number of elements and to make the size small, by relating either of a pair of affirmative and negative signal lines to a corresponding output signal line via one information transmitting element in accordance with the desired logical equation of the output signal line. CONSTITUTION:A pair of affirmative signal lines 1a-3a and negative signal lines 1b-3b are provided to logical input signals x1-x3, and output signal lines 11-13 are provided so that they are crossed with the signal pair lines. Between one of the output lines 11-13 and pair of affirmative and negative signal lines 1a-3a, 1b- 3b, one FET element only is provided, and either one of the affirmative and negative logical signals is related to one output signal line. The gates of the FETs at the cross point among lines without relation are grounded with common earth.

Inventors

• 👤 Kunihiko Hirashima

Bibliographic Details