Generating circuit of power-on reset signal

Abstract

Abstract PURPOSE:To stabilize the pulse duration of a reset signal, by connecting the drain of an MOSFET to a power source, grounding the source via a capacitor and then applying a pulse to a gate before application of power supply. CONSTITUTION:The drain of an MOSFET15 is connected to a power supply terminal 11, and an end of the source is connected to the other end 13 of a capacity 14 with its one end grounded. Then, at least a pulse having a time width with which the capacity 14 can be perfectly discharged is applied to a clock input terminal 12 before application of power source for an integrated circuit or the like. Thus the electric charge is completely discharged for the capacity 14 to set the potential of an output terminal 13 at logic ''O''. After this and at a desired time after application of power supply, the consecutive clock pulses are applied to the terminal 12 to keep the potential of the terminal 13 at logic ''1''.

Inventors

• 👤 Takashi Senba

Bibliographic Details