Manufacture of complementary type insulated gate field effect semiconductor device

Abstract

Abstract PURPOSE:To obtain a C-MOS having a variety of threshold voltages by injecting P type impurity in the channel regions of the first N-channel and P-channl MOS and injecting N type impurity in the second N-channel and P-channel MOS. CONSTITUTION:A P-well 2 and a thick field oxidized film 4 are formed on an N type silicon substrate 1. Then, with a photoresist as a mask P type impurity is injected in the channel region of the first N-channel and P-channel MOS to form injection regions 7, 8. Then, with the new photoresist 9 as a mask N type impurity ions 10 are injected in the channel region of the second N-channel and P-channel MOS to form injection regions 11, 12. Subsequently, a gate oxidized film 13 and a gate electrode 14 are formed, source and drain regions are formed to form a C-MOS semiconductor device. By varying the mask pattern the various threshold values can be provided in the MOS.

Inventors

• 👤 Takashi Sakamoto

Bibliographic Details