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JPS5720486A Expired / Lapsed JP ⏱️ 0.0 years remaining

Superconductive integrated circuit and preparation thereof

Assignee: NTT Inc
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Filing: 1980-07-11
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Granted: —
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Expires: 2000-07-11
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Abstract

Abstract PURPOSE:To stack josephson devices in multilayers through a flat-face layer insulation without use of resist by employing an oxide material which can be converted from an insulator to a superconductor by a laser annealing. CONSTITUTION:When a BaPb1-xBixO3 (0.05<=x<=0.30) or Lii+xTi2-4O4 (0.2<=x <=0.3) is evaporated on a normal temperature Si substrate 1, it takes amorphous form but can be converted to a superconductor or a semiconductor (resistor) by laser annealing. According to this method, first, a wiring layer 2 is formed. Then, layers 3 of this composition are piled and undergoes annealing to make an electrode 4 and a wiring 4'. Subsequently, layers 7 of the same composition are piled again through a tunnel barrier layer 6 made of a specified material to provide an upper electrode 8, a wiring 8' and a layer connectin 9 likewise. Thereafter, likewise, a control line 11, a layer connection 12 and a wiring layer 2 are formed in sequence on the layers 10 and 13 of the same composition. With such an arrangement, a multilayer stacking is possible because of the flat surface of the circuit thereby enabling integration.

Inventors

  • 👤 Toshiaki Murakami
  • 👤 Takahiro Inamura
  • 👤 Yoichi Enomoto
  • 👤 Minoru Suzuki
  • 👤 Takashi Inukai

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 20:10
CPC Classifications
H; H10; H10N; H10N69/00; H10N60/00; H10N60/01; H10N60/0912

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