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JPS5694451A Expired / Lapsed JP ⏱️ 0.0 years remaining

Microprocessor incorporating memory

Assignee: Fujitsu Ltd
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Filing: 1979-12-27
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Granted: —
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Expires: 1999-12-27
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Abstract

Abstract PURPOSE: To improve the control speed, by deciding whether address information is given for access to the internal memory or for access to the external memory and by switching automatically the instruction execution time for access to the internal memory and access to the external memory. CONSTITUTION: External memory 2 is connected to microprocessor 1 through address bus 4, data bus 5, and control signal line 6, and processor 1 is provided with internal memory 3. Further, address deciding circuit part 8 which decides whether address information is given as the address for memory 2 or as the address for memory 3 is connected to bus 4 of processor 1, and control signal generating circuit 9 which generates the control signal of the pulse width different in access to memory 2 and access to memory 3 is connected to circuit 8. Then, the instruction execution time is switched automatically for access to memory 2 and access to memory 3, thereby improving the control speed. COPYRIGHT: (C)1981,JPO&Japio

Inventors

  • 👤 Kenji Kato
  • 👤 Masaki Ogawa

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 11:00
CPC Classifications
—

Claims Analysis

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