Manufacture of semiconductor integrated circuit

Abstract

Abstract PURPOSE:To reduce the junction capacitance and steps on a surface by a method wherein the surfaces of an impurity diffused layer which is to be a wiring within an element and polycrystalline Si which is to be a wiring between elements are covered with thin metalic silicate compounds. CONSTITUTION:An Si nitride film 34 is formed on a P-type Si substrate 31, and by utilizing it as a mask a channel stopper 32 and a field oxide film 33 are formed. Next after a film 34 of a region where an element region is to be formed is removed, an Si oxide film 35 is formed, and on it patterned polycrystalline Si layers 36G, 36C and Si nitride films 37G, 37C are formed. Next by utilizing films 34, 37G and a film 36G which is to be a gate electrode as a mask, an N-type impurity diffusion region 38 which has shallow junction depth and is to be source and drain is formed. Next films 34, 37G, 37C are removed, and at the same time when an N-type diffusion layer 40 which has deep junction depth and is to be a wiring within an element is formed, N-type impurity is diffused also into the film 36G and the film 36C which is to be a wiring between elements. Next surfaces of a layer 40 and films 36G, 36C are covered with a thin metalic silicide layer.

Inventors

• 👤 Mitsutaka Morimoto
• 👤 Hiroki Muta

Bibliographic Details