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JPS5688341A Expired / Lapsed JP ⏱️ 0.0 years remaining

Laminated semiconductor device

Assignee: Hitachi Ltd
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Filing: 1979-12-21
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Granted: —
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Expires: 1999-12-21
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Abstract

Abstract PURPOSE:To reduce the mounting space of a laminated semiconductor device by interposing lead wires securing semiconductor pellets between a lower cap and a spacer and between the spacer and an upper cap and packaging them. CONSTITUTION:The lower cap 12 is formed of a flat plate, the upper cap 13 and the spacer 14 have recesses 13a and 14a respectively on the lower surfaces thereof, and are formed on ceramic. The lead wire 6 securing the pellet 4 is interposed between the lower cap 12 and the spacer 14, and the lead wire 5 securing the pellet 3 is interposed between the spacer 14 and the upper cap 13, and the lead wires 5, 6 are sealed with glass 15. According to this configuration, the plane space can be reduced, and the height can also be reduced as compared with a simple lamination. In addition, the manufacturing work can be simple in the same manner as the conventional one.

Inventors

  • 👤 Yuji Sano
  • 👤 Hajime Murakami

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-05 17:47
CPC Classifications
H; H10; H10W; H10W95/00; H10W90/00; H10W70/00; H10W70/60; H10W72/00; H10W72/801; H10W72/851; H10W72/874; H10W72/884; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/752; H10W90/756

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