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JPS5680944A Expired / Lapsed JP ⏱️ 0.0 years remaining

Synchronism detecting circuit of digital receiver

Assignee: Fujitsu Ltd
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Filing: 1979-12-05
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Granted: —
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Expires: 1999-12-05
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Abstract

Abstract PURPOSE:To detect a step-out with simple constitution by supervising an I pattern appearing in a demodulation output. CONSTITUTION:Clock signal (b) extracted from received signal Di synchronizes with signal (a) demodulated by a detecting circuit. Signal (a) is sampled at rises of clock (b) and clock (c) slightly lagging clock (b) to obtain exclusive OR output (f) between both sampling outputs (d) and (e). Signal (f) consists of pulses of time width equivalent to the difference between clocks (b) and (c) and since integral output (g) of signal (f) is small as far as clock (b) and demodulation output (a) are normal, alarm (h) is never outputted. If a step-out occurs, on the other hand, the OR operation between sampling outputs by clocks becomes irregular and signal (f) increases in pulse width to increase integral output (g), sending alarm output (h) out.

Inventors

  • 👤 Takayuki Ozaki

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-25 15:58
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/02; H04L7/033; H04L7/0337

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