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JPS56746A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor integrated circuit

Assignee: Mitsubishi Electric Corp
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Filing: 1979-06-15
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Granted: —
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Expires: 1999-06-15
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Abstract

Abstract PURPOSE:To simplify the pattern design and to perform large scale circuit integration. By the constitution that the logic function of sum of products type can be realized by taking the logic functional blocks as ROM having AND function and OR function. CONSTITUTION:The input signal from the input terminals I1-Ij is fed to ROM 1 to take logical product, and the outputs of the result P1-Pk are fed to ROM2. ROM2 executes logical sum from this input signal to output the signals O1-O . Further, ROM1, 2 constitute the standard cell 1, which plays a role of the programmable logic array PLA having the function to execute the sum of the logical product of the input signals. This cell 1 is arranged in matrix shape and the integrated circuit is constituted by wiring between cells. Since the cell 1 takes PLA form, the pattern design to realize the combined logic is easy and since the number of equivalent gate functions per unit area is increased, it is advantageous to high circuit integration.

Inventors

  • 👤 Osamu Tomizawa
  • 👤 Masao Nakaya
  • 👤 Kenji Anami

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 20:23
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17704; H03K19/17708

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