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JPS567463A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device and its manufacture

Assignee: Hitachi Ltd
•
Filing: 1979-06-29
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Granted: —
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Expires: 1999-06-29
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Abstract

Abstract PURPOSE: To reduse the area of collector regions by a method wherein doped poly Si layers are formed on the surface of a base layer among the collector layers and an emitter layer on one main surface through an insulating film, one portion of the poly Si layers and the emitter layer are connected, and electrodes are formed. CONSTITUTION: An n - epitaxial layer 2 is made up to a p-type Si substrate 1 with an n + buried layer 12, and separated by p + -layers 11. Windows are selectively opened to an SiO 2 film 3, p + collector layers 10 and an n + base extracting layer are formed surrounding a p + emitter layer 9. Doped poly Si are circularly made up on SiO 2 films 3' among the layers 9 and 10. The surface is covered with a PSG4, and electrodes 5, 7, 8 are formed. The emitter electrode 8 may be connected to the poly Si 6 at one position. According to this constitution, it is unnecessary that a base layer is covered with the emitter electrode because recombination on the surface of carriers injected to the base from the emitter is decreased. Thus, the areas of the collector regions can be redused as compared to conventional devices, and the degree of integration can be improved. COPYRIGHT: (C)1981,JPO&Japio

Inventors

  • 👤 Hideki Yasuoka

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 09:10
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10D10/00; H10D10/60; Y; Y10; Y10S; Y10S148/00; Y10S148/01; Y10S148/011

Claims Analysis

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References Cited (Backward Citations)

JPS4979782A Cited
JPS501674A Cited
JPS5359376U Cited

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