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JPS567295A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor memory unit

Assignee: Toshiba Corp
•
Filing: 1979-06-25
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Granted: —
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Expires: 1999-06-25
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Abstract

Abstract PURPOSE: To make it possible to write data under the state where the P-ROM is connected to the system, by using the memory program board connected to the computer system through a bus. CONSTITUTION: Control circuit CS outputs program control signal PRGP and busy signal B, which indicates to control signal bus C-BUS of the CPU system that memory access is being executed, by turning-on of switch SW, which is provided on memory program board PB, and the write cycle of read/write signal R/W. The request to hold the address and data to be programmed is output in the course of output of signal B, and next, signal PRGP is output and is given to the base of switching transistor TR, and the program voltage given to terminal PT is switched and is given to a prescribed terminal of P-ROM1, 2. Select signals SEL1 and SEL2 are kept in the program state for a proper time to write data to the pertinent P-ROM. COPYRIGHT: (C)1981,JPO&Japio

Inventors

  • 👤 Yoshimori Obata

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 08:23
CPC Classifications
—

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