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JPS5660933A Expired / Lapsed JP ⏱️ 0.0 years remaining

Information processor

Assignee: NEC Corp
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Filing: 1979-10-22
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Granted: —
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Expires: 1999-10-22
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Abstract

Abstract PURPOSE: To perform flexible high-speed data transfer between input-output equipment and a memory by providing a direct memory access controller that exercises continuous and automatic control on direct memory access transfer regarding plural data blocks. CONSTITUTION: Direct memory access DMA start addresses of data blocks decentralized in the memory and the number of words are stored in memory part 3 successively. At the point in time when DMA transfer regarding one data block ends, the contents of memory part 3 assigned by the contents of the 2nd address register 4 are loaded into the 1st address register 1 and count register 2. Further, the DMA transfer regarding the next data block is started and repeated while the contents of register 4 are updated. Thus, the DMA controller that exercises continuous and automatic control on the DMA transfer regarding data blocks is provided so as to attain flexible high-speed data transfer between the input-output equipment and memory. COPYRIGHT: (C)1981,JPO&Japio

Inventors

  • 👤 Hiromasa Tanabe

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 20:02
CPC Classifications
—

Claims Analysis

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References Cited (Backward Citations)

JPS5192129A Cited
JPS52147032A Cited

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