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JPS5658269A Expired / Lapsed JP ⏱️ 0.0 years remaining

Mos type semiconductor device

Assignee: Seiko Epson Corp
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Filing: 1979-10-17
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Granted: —
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Expires: 1999-10-17
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Abstract

Abstract PURPOSE:To enable access between one conduction type region and an opposite conduction type region and increase the density of a C-MOS using the both regions by a mechanism wherein the one conduction type polycrystal Si layer is formed on the opposite conduction type Si substrate through an insulating film, and the polycrystal Si layer is annealed by laser, etc. and changed into large crystals. CONSTITUTION:An N type region is formed to a P type Si substrate 5 in a diffusion shape, a concave section is made up at a fixed region, and the whole surface containing the concave section is coated with an insulating film 6 consisting of SiO2 or Si3N4. N type impurities are contained in the whole surface and a polycrystal Si film 7 provided with conductivity is deposited, and the film 7 is left only into the concave section as the film 8 and others are removed. The remainder film 8 is annealed by laser, electron beams, etc., and the crystals are changed into large crystals, diameters thereof are several dozen mum. Thus, the P type region and the N type region are brought near through the film 6, the film 8 is changed into large crystals, and the substrate suitable for a C-MOS, etc. is manufactured.

Inventors

  • 👤 Toshiaki Ogata

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 18:49
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/02; H10D84/03; H10D84/038

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