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JPS5655074A Expired / Lapsed JP ⏱️ 0.0 years remaining

Schottky barrier gate type field effect transistor

Assignee: CHIYOU LSI GIJUTSU KENKYU KUMIAI
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Filing: 1979-10-11
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Granted: —
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Expires: 1999-10-11
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Abstract

Abstract PURPOSE:To enable the self-alignment of a source and a drain in a microminiature structure by forming at least a part of an electrode connected directly to the diffused layers of the source and drain of a semiconductor substrate of high melting point metal silicide. CONSTITUTION:Mo and Si are simultaneously evaporated in vacuum on the entire surface of the epitaxial layer 2 of a semiconductor substrate 3, an MoSi film having a thickness of approx. 2,000Angstrom is coated thereon, is then patterned by a photoetching process with CF4 gas plasma as etching means, is brought into direct contact with the layer 2 through an opening 6, and a gate of electrode 7 of MoSi2 extended on an SiO2 film 5 is formed thereon. When a Schottky FET is formed by this means, since the gate electrode 7 is formed of the MoSi2, the source 8 and the drain 9 are self- aligned with respect to the gate electrode 7 to enable a microminiature structure.

Inventors

  • 👤 Toru Mochizuki
  • 👤 Yoshio Nishi

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 17:55
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/87

Claims Analysis

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References Cited (Backward Citations)

JPS499914A Cited

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