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JPS5634199A Expired / Lapsed JP ⏱️ 0.0 years remaining

Memory correction system

Assignee: Fujitsu Ltd
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Filing: 1979-08-27
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Granted: —
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Expires: 1999-08-27
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Abstract

Abstract PURPOSE: To make easy the correction of content of ROM, by providing the patching unit. CONSTITUTION: The address information of the main memory unit 5 is stored in the address register 1, the patch detection circuit 3 in the patching unit a receives the address information via the bus 101, and the patch information storage circuit 2 detects the presence of patch with the comparison with the patch address preset. If patch is present, the significance signal 301 is fed to the address conversion circuit 4, the circuit 4 obtains the address of PROM area of the unit 5 corresponding to the patch address and feeds it to the unit 5. Thus, the unit 5 fetches the program information corresponded from ROM or PROM and feeds it to the data register 6. COPYRIGHT: (C)1981,JPO&Japio

Inventors

  • 👤 Susumu Inoue
  • 👤 Jiro Osawa
  • 👤 Masakado Maekawa
  • 👤 Isao Ikeda

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-03 11:14
CPC Classifications
—

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