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JPS5628528A Expired / Lapsed JP ⏱️ 0.0 years remaining

Electronic circuit

Assignee: Fujitsu Ltd
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Filing: 1980-04-25
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Granted: —
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Expires: 2000-04-25
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Abstract

Abstract PURPOSE:To simplify the circuit constituting the tertiary logic, by introducing the conception of the series gate with the emitter connection logic as the base. CONSTITUTION:In case of V1>VR1, transistors T2 and T1 are turned on and off respectively, and output voltage V01=V02=Vcc-1/2(R1+R2) is true independently of input voltage V2. In case of V1<VR1, transistors T1 and T2 are turned on and off respectively; and in case of V2>VR2, transistors T3 and T4 are turned off and on respectively, and V01 Vcc and V02=Vcc-R1I0 are true. In case of V2<VR2, V02 Vcc and V01=Vcc-R1I0 are ture. By selecting properly resistances R1 and R2, two voltage from the external are controlled to obtain three values as the output voltage. The level of the output voltage can be set arbitrarily, and this circuit is suitable for the amplifier of the semiconductor memory.

Inventors

  • 👤 Yukio Takahashi

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-27 08:56
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/091; H03K19/0917

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