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JPS5624968A Expired / Lapsed JP ⏱️ 0.0 years remaining

Programmable read-only semiconductor memory cell and programmable read-only semiconductor memory circuit device using the same

Assignee: NTT Inc
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Filing: 1979-08-09
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Granted: —
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Expires: 1999-08-09
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Abstract

Abstract PURPOSE:To obtain a read-only memory device having low required current for program by continuously bonding P type or N type polycrystalline or amorphous semiconductor layers, applying voltage thereto to make the nondestructive and destructive state of the junction correpond to logic values. CONSTITUTION:P type polycrystalline or amorphous Si layer 37 is continuously arranged to N+ type polycrystalline or amorphous Si layers 35, 39 on a substrate 33 coated with an SiO2 film 32 on an Si monocrystal 31. SiO2 film 40 is coated, an openings are perforated thereat as designated by 41, 42, and aluminum wiring layers 43, 44 are formed thereon. In this configuration program is obtained by the destruction of the junction 36 or 38, and when the junction 36 is destructed by the voltage, a current flows through the layers 35, 37, 39 to cause the junction 36 to generate heat to introduce the impurity in the layer 35 into the layer 37 to reach the layer 39. Said current is extremely low, and does not dissipate externally the heat of the junction 36 through the SiO2 film, and the impurity is diffused fastly in the polycrystalline or amorphous Si layers. In this manner, it can obtain a PROM which can program with smaller current than the conventional monocrystalline device.

Inventors

  • 👤 Hideo Yoshino
  • 👤 Eisuke Arai
  • 👤 Kazuhide Kiuchi

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-31 20:08
CPC Classifications
H; H10; H10B; H10B20/00; H10B20/10; H10B20/20

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