Master slice type integrated circuit

Abstract

Abstract PURPOSE:To accelerate the signal processing speed of the master slice type integrated circuite having a plurality of unit regions formed with circuit elements on the same substrate by forming memory regions having memory cells adjacently with the unit regions. CONSTITUTION:A plurality of unit regions ji having having i includes 1-m and j includes 1-n are formed on one semiconductor chip T, and circuit elements are formed in the respective regions. Then, the unit regions and the circuit elements are electrically connected with each other to form the master slice type integrated circuit. In this configuration memory regions 22, 23, 32, 33 or the like having memory cells adjacent to any of the unit regions are formed on the same chip T. Each region has a plurality of memory cells 101-104, address driver D1 having bit lines L1-L3, address driver D2 having word lines K1-K3, and an amplifier P to reduce the floating capacity and the wiring length of the circuit elements and the memory cells so as to accelerate the IC operation.

Inventors

• 👤 Katsuyuki Hamada

Bibliographic Details