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JPS5617540A Expired / Lapsed JP ⏱️ 0.0 years remaining

Synchronism detecting system

Assignee: NEC Corp
•
Filing: 1979-07-20
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Granted: —
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Expires: 1999-07-20
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Abstract

Abstract PURPOSE:To reduce greatly the time required for detection of the synchronous pattern, by storing each row and each column in the form of the bit number of the subframe and the bit number of the frame synchronous pattern respectively in case the received data are stored into the memory circuit in a matrix-shaned formation. CONSTITUTION:In case the received data are stored into memory circuit which stores the contents of the received data in the matrix-shaped formation, each row and each column are stored by time slot counters 7 and 8 and in the form of the bit number of the subframe and the bit number of the frame synchronous pattern respectively. And this bit contents of every column and the frame synchronous patterns within shift register 11 are shifted one by one to be collated through collating circuit 10. When the synchronism is obtained with the frame synchronous pattern, the control is given so that the values of counters 7 and 8 corresponding to the position of the column in which the synchronism is obtained are rewritten to the frame synchronous bit numbers which are decided previously.

Inventors

  • 👤 Makoto Miyazaki

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-04 16:14
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0602; H04J3/0605

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