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JPS5615052A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor device with multilayer wiring

Assignee: Hitachi Ltd
•
Filing: 1979-07-18
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Granted: —
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Expires: 1999-07-18
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Abstract

Abstract PURPOSE:To enable microminiaturization of the multilayer wiring semiconductor device and reduce the capacity between layers by forming the thin the first layer and the thick the second layer fromed thereon in an insulating film between the layers and forming the through hole of the first layer smaller than the second layer. CONSTITUTION:An SiN film 5 of the first layer is formed thin, a through hole 7 is perforated small in size d1, a polyimide group resin film 6 of the second layer is formed thick, and a through hole 8 is perforated large in size d2, and Al wire 3 of the first layer is connected through the holes to the Al wire 4 of the second layer. As a result, the upper and the lower wires can be connected via the through holes sufficiently minutely perforated at the thin insulating film of the first layer. On the other hand, even if the first and the second layer wires are superimposed at the other portion, the thick insulating film of the second layer can be existed to eliminate the adverse effect of the increase in the capacity between the wires thereat.

Inventors

  • 👤 Tatsu Ito
  • 👤 Kiichiro Mukai

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-29 18:38
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W72/00; H10W72/50; H10W72/531; H10W72/536; H10W72/551; H10W72/552; H10W72/5524; H10W72/59; H10W72/90; H10W72/931; H10W72/934

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS52156585A Cited
JPS53116087A Cited

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