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JPS56130899A Expired / Lapsed JP ⏱️ 0.0 years remaining

Write-in system of fail memory

Assignee: Toshiba Corp
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Filing: 1980-03-17
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Granted: —
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Expires: 2000-03-17
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Abstract

Abstract PURPOSE:To enable accurate write-in without change in time reference pulse, by changing the output reference pattern according to the relative location of strobe to the time reference pulse and controlling the write-in to the fail memory. CONSTITUTION:The reference pattern is read out from the input/output reference pattern memory 1 via the reference time pulse generating section 3, and address counter 2, and the comparison with the measured integrated circuit output is made at the discrimination circuit 5 in response to the strobe output from the strobe pulse generator 4, and the result is written in the fail memory 10. On the other hand, according to the relative location signal to the time reference pulse output from the generating section 3 of the strobe output from the generator 4, the output reference pattern is shifted by strobe minimum width WMIN via the delay circuit 11 and selector 12, and the time of generation is controlled for the write-in pulse outputted from the write-in control section 8. Thus, without change of the time reference pulse, the accurate write-in to the fail memory can be made without malfunction independently of the location of strobe generation.

Inventors

  • 👤 Ken Hashizume

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-08 01:34
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/56

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