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JPS5611523A Expired / Lapsed JP ⏱️ 0.0 years remaining

Suppressing unit for voltage variance

Assignee: Nissin Electric Co Ltd
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Filing: 1979-07-06
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Granted: —
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Expires: 1999-07-06
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Abstract

Abstract PURPOSE: To enable the control in high speed, by providing the circuit eliminating the effect of the operation of the inactive power compensation unit with the voltage detection circuit. CONSTITUTION: The bus voltage detector PT is connected to the bus 3, the current transformer CT is coupled between the reactor 4 constituting the inactive power compensator and the bus 3, and the voltage corresponding to the current flowing to the reactor 4 is held at the load l. Further, the unit PT and the load l are connected so that the output V of the unit PT and the terminal voltage of the load l can be opposite polarity, and the voltage Vc after compensation is input to the full wave rectifying circuit 6. the output of the circuit 6 is input to the time sharing comparison integrating circuit 7, the voltage value is integrated from zero to 120°, and the difference voltage with the reference voltage is held at the sample hold circut 8. This voltage difference is input to the trigger angle determining circuit 9 to determine the trigger angle, and trigger pulse is delivered to one of the thyristor 5 with the trigger pulse circuit 10 to enable power application control for the reactor 4. The effect on the control system can be avoided with the current of the reactor 4. COPYRIGHT: (C)1981,JPO&Japio

Inventors

  • 👤 Atsushi Nishidai
  • 👤 Shinichiro Nishimura

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 03:13
CPC Classifications
—

Claims Analysis

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References Cited (Backward Citations)

JPS5189146A Cited

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