Mos integrated circuit device

Abstract

Abstract PURPOSE:To reduce the power consumption, by blocking the formation of DC current path from the power supply to ground, through the connection of the drain and gate of charging MOSFET to the output node. CONSTITUTION:When a control signal phi1 is at high level, a node N1 is charged via a load MOSFET11 and N1 is kept to floating state for a given period T. At the same time, N2 is charged via a charging MOSFET14, signal phi3 is repetitively fed during the period T to drive a level keeping MOSFET13, and N1 is kept to the level of the power supply VDD. After the period T, if the signal phi2 is at high level, the potential of N1 is discharged via a switching FET12, and the discharge FET16 is ON with the signal phi4 in synchronizing with the signal phi2 and the potential of N2 is also discharged. Thus, FET13 is OFF and no DC current path from the power supply to ground is formed during the period when N1 is kept to the ground potential VSS after the period of T.

Inventors

• 👤 Isao Ogura

Bibliographic Details