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JPS56103455A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor ic device

Assignee: Fujitsu Ltd
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Filing: 1980-01-22
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Granted: —
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Expires: 2000-01-22
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Abstract

Abstract PURPOSE:To make LSI operations be speeded up by minimizing a heat resistance by a method wherein semiconductor multilayer wiring chips and LSI chips are connected with each other through projecting electrodes for connection fitted on the respectively faced surfaces to each other, the LSI chips side is fixed on a ceramic substrate and a cooling tube are closely attached on the reverse of the substrate. CONSTITUTION:The projecting electrodes 12a, 12b for electrical connections and pads are formed on the surfaces of the LSI elements 10a, 10b respectively large in heating value, on which a transistors, resistors and wirings etc. of a high speed ligical circuit and the like are arranged. The projecting electrodes 13a, 13b for connections and the pads are formed as well on the bottom surfaces of semiconductor multilayer wiring chips 11a and 11b small in heating value which are connected to the projecting electrodes 12a, 12b are the pads, and the electrodes 12a, 12b and 13a, 13b respectively are attached to each other and the pads are connected in common using a wire 16. Subsequently, the reverse sides of the elements 10a, 10b are fixed to the ceramic substrate 14 and the cooling tube 18 having a through opening 19 through which a cooling medium is flowed is fixed to the reverse of the substrate 14. Thus, the heating value in the circuit is increased to obtain a high speed.

Inventors

  • 👤 Kenichi Ono

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-29 17:57
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W70/67; H10W70/68; H10W70/685; H10W90/00; H10W90/701; H10W90/721; H10W90/724

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS51102566A Cited
JPS5394075U Cited

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