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JPS56100482A Expired / Lapsed JP ⏱️ 0.0 years remaining

Manufacture of fet

Assignee: Panasonic Holdings Corp
•
Filing: 1980-01-14
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Granted: —
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Expires: 2000-01-14
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Abstract

Abstract PURPOSE:To obtain FET having the property of sefe-alignment and fine gate length by selecting the kind and thickness of an insulation film to be used, covering the same with photosensitive resin and then applying etching thereto on the occasion that FET is prepared by photoetching. CONSTITUTION:On an N type GaAs layer which is an active layer made to grow on a semi-insulated GaAs substrate, an Si3N4 film 2 about 500Angstrom thick, an SiO2 film 3 containing phosphorus about 3,000Angstrom thick and an Si3N4 film 4 about 1,000Angstrom thick are laminated and connected thereto. Next, by using photosensitive resin 5 having an opening in a gate-forming region as a mask, plasma etching is applied to the film 4, chemical etching to the film 3 and reactive spatter etching to the film 2 respectively, while the film 3 containing phosphorus is made side-etched. After that, shot-key junction forming metal such as Al is connected to the whole surface, an Al layer 7 is made to be present in the layer 1 exposed, and resin 5 is removed together with an Al layer 7' thereon. Then, photosensitive resin 8 is applied and later is removed together with the resin 8 thereon, whereby a Schottky electrode 7 contained in the resin 8 is obtained.

Inventors

  • 👤 Toshio Sugawa
  • 👤 Takeshi Konuma

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-29 13:14
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5396671A Cited

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