Tri-state logic circuit

Abstract

Abstract PURPOSE:To realize the tri-state logic circuit less in power consumption and easy for design and manufacture, by providing the switching logic gate controlling with the signal in opposite phase and a give period between one input terminal and high potential power supply terminal and reference potential terminals. CONSTITUTION:The switch Sd and resistor RD are connected between the input I and the high potential power supply terminal VDD, and the switch Ss and resistor Rs are connected between the input I and the reference terminal Vss. Further, the input 1 is connected to the two delay circuits 3, 4. The output of the delay circuit 3 and the input I are fed to the AND gate 5 to take the output as OUT1, and the output of the delay circuit 4 and the input I are fed to the OR gate 6 to take the output as OUT2. Further, the switches SD and Ss are controlled mutually with the signal in opposite phase at a certain period to perform switching alternately, then no current flows between VDD-Vss to obtain the tri-state logic circuit.

Inventors

• 👤 Yasunobu Okano

Bibliographic Details