Clock signal distribution system

Abstract

Abstract PURPOSE: To eliminate undesired variation in pulse width by shortening a period while avoiding an influence of the rounding of a waveform, etc., in transmission, by providing a frequency multiplier circuit and chopper circuit which shorten pulse width to fixed width near a load circuit. CONSTITUTION: On printed substrate 1, several integrated-circuit elements LSI4 are packaged and in the center, clock signal distributor 5 is provided which distributes clocks from clock generator 7 to respective circuit elements 4. Near latch circuit 11 which forms a load on circuit elements 4 receiving clock signals from distributor 5, chopper circuit 10 is provided which compresses pulse width to fixed width, and this circuit 10 is composed of a circuit of NOR gate circuits 12W14 or inverters combined and two-input NOR circuit 15 serving as a frequency multiplier circuit; and the duty ratio of a clock signal generated by generator 7 is fixed to approximate 50%, and consequently the rounding of a waveform and variation in pulse width caused by components in substrate 1 and wiring are prevented. COPYRIGHT: (C)1980,JPO&Japio

Inventors

• 👤 Tatsuro Yoshimura

Bibliographic Details