← Back to Patent Explorer
JPS5572079A Expired / Lapsed JP ⏱️ 0.0 years remaining

Production of semiconductor device

Assignee: Fujitsu Ltd
•
Filing: 1978-11-27
•
Granted: —
•
Expires: 1998-11-27
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract PURPOSE: To facilitate the concentration of low impurities and heighten the drain voltage resistance by forming a channel of the depression type element or the like using a mask layer covering the entire gate electrode of the enhancement type MIS type semiconductor element. CONSTITUTION: A p-type Si substrate 11 is provided with a p + -type channel cut region 12 which is covered with a thick field SiO 2 film 13. The surface of the substrate 11 exposed between the region and film is covered with a thin gate SiO 2 film 14. Then, gate electrodes 15E and 15D each made of a polycrystaline Si are provided at the central part thereof. With the film 14 as the mask, an n-type source region 16E and drain region 17E, 16D, and 17D are individually formed by diffusion in the substrate 11. Thereafter, one electrode 15E alone of the enhancement type element is entirely covered with a photo resist 18 while ion is injected under the other electrode 15 alone whereby an n-type channel 19 is formed. An n-type impurity is injected to give a step between the regions 16E and 17E while the regions 16D and 17D are made deeper as it is. COPYRIGHT: (C)1980,JPO&Japio

Inventors

  • 👤 Katsuyuki Inayoshi
  • 👤 Kazutoshi Miyao

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 11:21
CPC Classifications
—

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag