Memory circuit

Abstract

Abstract PURPOSE:To intermit the refresh of dynamic memory without injuring the memory content, by enabling the precharge operation only when the address lines are all at low level. CONSTITUTION:When one of the write in address lines AL2, AL2'... is at high level and when either memory is refreshed, either of the gates Q11, Q12... is conductive, and the precharge timing signal P2 is not high level with the high level of inversion signal in the timing signal and the digit lines are not precharged. Accordingly, even if the refresh cycle is intermittent with any timing, the memory content of the memory in matrix formation is not changed, and the dynamic memory requiring precharge is controlled in the good timing not disturbing the content of memory cell. Further, the similar result can be obtained, by delaying the period of high level timing signal when the digit lines are inverted to high or low level by using a delay circuit.

Inventors

• 👤 Shigeki Matsue

Bibliographic Details