Complementary mos inverter circuit unit and its production

Abstract

Abstract PURPOSE:To eliminate the generation of spike-form noise and make an operation speed high in the transitional region of a transmission characteristic by constituting a complementary MOS inverter circuit unit by P-type and N-type MOS transistors, NPN-type and PNP-type bipolar transistors and plural diodes. CONSTITUTION:Complemetary MOS inverter circuit 1 is constituted by P-type and N-type MOS transistors 2 and 3, NPN-type and PNP-type bipolar transistors 4 and 5 are level shift diodes 6 and 7. Drain regions 8 and 9 of MOS transistors 2 and 3 are connected commonly through diodes 6 and 7 respectively, and their gate regions 10 and 11 are connected commonly by conductors 12 and 13. Meanwhile, emitter regions 14 and 15 of transistors 4 and 5 are connected to output terminal 17 by conductor 16. Transistor 4 is used as the load of transistor 5. In this circuit, spike- shaped noise is not generated in the transitional region of a transmittion characteristic because transistors do not become a non-conduction state simultaneously.

Inventors

• 👤 Kimito Horie

Bibliographic Details