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JPS5544751A Expired / Lapsed JP ⏱️ 0.0 years remaining

Memory device

Assignee: NEC Corp
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Filing: 1978-09-25
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Granted: —
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Expires: 1998-09-25
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Abstract

Abstract PURPOSE:To realize a memory cell integrated extremely high, by forming a substrate for storage capacity and a reverse conductive region at the lower substrate side of a region where a transistor for switching is made up. CONSTITUTION:A transistor Tr for switching consists of a triple diffusion self- matching type Tr, and uses N-type regions 108, 109 as a source and a drain and a source of a P-type region 107 as a channel. An address wire 110 functions as a gate electrode of the ring type Tr, and a bit wire 111 is connected to the region 109. The region 108 is connected to an N-type region 105 covering the region 107 in an ohmic-contact shape. A P<+>-type region with the impurities of high concentration is placed so as to contact with the region 105. Thus, storage capacity can be brought to sufficiently large value because it is junction capacitance built up by regions 102, 104, 107 with the impurities of high concentration and the high level type region 105 of the concentration of impurities.

Inventors

  • 👤 Osamu Kudo

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-02 03:26
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/33

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