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JPS5524489A Expired / Lapsed JP ⏱️ 0.0 years remaining

Insulated gate type semiconductor

Assignee: Panasonic Holdings Corp
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Filing: 1978-08-10
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Granted: —
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Expires: 1998-08-10
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Abstract

Abstract PURPOSE: For raising mutual conductance considerably, to generate parasitic transistor effect by interconnecting a MOS type element gate electrode and a semiconductor substrate by means of the resistor having a proper resistance value. CONSTITUTION: N + -type source range 3 and drain range 2 are diffusedly formed on a P-type semiconductor substrate 1, and a gate electrode 5 is fitted on the oxidized gate film 4 provided on the surface of said substrate 1. Next, a source terminal S, a drain terminal D and a terminal G are provided at said range 3 and range 2 and on said electrode 5, and said terminal S is earthed. Further, said electrode 5 and substrate 1 are intentionally interconnected by means of a resistor R, and part of the current of said electrode 5 is let flow into said substrate 1 for making an NPN lateral transistor with said substrate 1 used as base. Thereby, drain current increases due to the induction of current amplification. Thus, this insulated gate type semiconductor shows such a characteristic that element apparently increases in mutual conductance. COPYRIGHT: (C)1980,JPO&Japio

Inventors

  • 👤 Shigeru Watari
  • 👤 Eisuke Ichinohe

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 07:59
CPC Classifications
—

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