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JPS55145451A Expired / Lapsed JP ⏱️ 0.0 years remaining

Error correcting device

Assignee: Sony Corp
•
Filing: 1979-04-27
•
Granted: —
•
Expires: 1999-04-27
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Abstract

Abstract PURPOSE:To enhance the error correcting capacity by making use of the error detection code such as the CRC code in addition to the error correcting capacity with addition of two parity signals and thus securing the error correction and the comparison between the two syndromes. CONSTITUTION:The audio signals of the PCM series corresponding to the audio signal of the left channel sent from input terminal IL and the PCM series corresponding to the right channel from input terminal IR are applied to EX OR gate 2 to produce 1st parity signal Pi. Then PCM signal Ri-3 and parity signal Pi-s are delayed via delay circuits 3 and 4 of 3 and 8 words each to be supplied along with PCM signal Li which is not delayed to EX OR gate 5 to produce 2nd parity signal Qi. Then PCM signal Ri-16 delayed by 13 words, parity signals Pi-32 and Qi-35 delayed by 24 and 35 words each plus PCM signal Li are applied to CRC encoder 9. And the code of Ci is formed to 4 words via the CRC code in order to enhance the error correcting capacity.

Inventors

  • 👤 Toshitada Doi
  • 👤 Kentaro Odaka

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-24 15:12
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/1806; G11B20/1809

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS51147925A Cited
JPS53124906A Cited

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