Semiconductor device

Abstract

Abstract PURPOSE: TO reduce resistance value and increase the scale of integartion by forming gate electrodes with a laminate of a polycrystalline Si layer and SiO 2 film as well as a metal layer such as of Mo at the time of forming the gate electrodes to MOS transistors, etc. CONSTITUTION: Thick field SiO 2 films 4 are deposited on both end faces on a P type Si substrate 1, and a thin gate SiO 2 film 5 is deposited between these. Next, a polycrystalline Si laye 7 doped with an N type impurity is deposited on the film 5 and is then covered with a SiO 2 film 8, on which is next evaporated a metal lyaer 9 such as of Mo of an electric conductivity higher than that of the layer 7. Thereafter, the pattern 6 of SiO 2 film is provided, through which the metal layer 9 of the exposed regions and the SiO 2 film 8 and Si layer 7 thereunder are subsequently etched away. Next, N type source and drain regions 2, 3 are diffusion-formed within the exposed substrate 1, and a SiO 2 film 6' is provided frow part of the regions 2 and 3 up onto the pattern 6 and is then etched with openings, after which an Al gate electrode is deposited on the metal layer 9. An Al electrode 10 is mounted to the regions 2 and 3 as well COPYRIGHT: (C)1979,JPO&Japio

Inventors

• 👤 Taiichi Inoue

Bibliographic Details