Production of semiconductor chips

Abstract

Abstract PURPOSE: To reduce chip area and facilitate wiring on packaging substrate by providing two or more intended pad forming regions at the forming of wiring layers, selecting one of them according to packaging conditions of the chip and opening the insulation film of that portion and providing a pad. CONSTITUTION: Al wiring patterns are made by partially opening holes in the insulation film on a Si substrate on which chips 10 formed with a multiplicity of the same circuits are arrayed and disposed. At this time, intended pad forming regions 14 are provided at two positions in the wiring layer 17 as for the electrode of each cell 11, and again the surface is covered with an insulation film 13. One of these is selected and a pad 12 is made. The selection is determined by the configuration of the wiring layer 17 on the packaging substrate 15 side and it is so selected that the pad goes apart when the wiring layer passes between the two electrodes. In the part corresponding to the marking position, the spacing between the adjoining pads is also selected wide. Then, the Ni electrode 16 on the wiring layer of the packaging substrate and the pad 12 of the chip 10 overlap accurately and there is no need for enlargement of the cell region COPYRIGHT: (C)1979,JPO&Japio

Inventors

• 👤 Hitomi Tojiki

Bibliographic Details