JPS5381024A
Expired / Lapsed
JP
⏱️ 0.0 years remaining
Semiconductor memory divice
Assignee: Fujitsu Ltd
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Filing: 1976-12-27
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Granted: —
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Expires: 1996-12-27
Abstract
Abstract PURPOSE:The treshold level of the MOS transistor constituting a memory cell can be varied in a stage shape and one of many pieces of information can by also written selectively, so that the memory capacity can be expanded greatly and a large amount of information can be stored in a small area.
Inventors
- 👤 Shigenobu Taira
Bibliographic Details
Application Number
—
Jurisdiction
JP
Data Source
google_patents
Last Synchronized
2026-11-09 09:42
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0466
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