JPS5219059A
Expired / Lapsed
JP
⏱️ 0.0 years remaining
Exclusive or circuit
Assignee: NTT Inc
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Filing: 1975-08-04
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Granted: —
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Expires: 1995-08-04
Abstract
Abstract PURPOSE:An exclusive logical sum circuit which has achieved the high speed of operating time.
Inventors
- 👤 Yukio Takahashi
- 👤 Noboru Hagiwara
Bibliographic Details
Application Number
—
Jurisdiction
JP
Data Source
google_patents
Last Synchronized
2026-11-02 15:24
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/20; H03K19/21; H03K19/215
Claims Analysis
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