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JPH0936151A Expired / Lapsed JP ⏱️ 0.0 years remaining

Small resin mold integrated circuit device manufacturing method and integrated circuit device manufactured by this method

Assignee: Japan Aviation Electronics Industry Ltd
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Filing: 1995-07-20
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Granted: —
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Expires: 2015-07-20
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Abstract

Abstract Translated from Japanese (57)【要約】 【課題】 表面実装部品としての小型樹脂モールド集積 回路装置を小型化、高密度化、製造のローコスト化する 小型樹脂モールド集積回路装置の製造方法および装置を 提供する。 【解決手段】 1枚のプリント配線基板4に上下左右方 向に格子状に複数のベアチップ1を取り付け接続し、プ リント配線基板4および複数のベアチップ1上面全体に 一様にポッティング剤6を充填してポッティング剤6中 に複数のベアチップ1全体を埋没させて1枚のベアチッ プ1集合体をモールド形成し、ベアチップ1集合体を上 下左右方向にカットしてベアチップ1を各個に切り出 し、各個に切り出されたベアチップ1の外表面を研削す る小型樹脂モールド集積回路装置の製造方法および装 置。 (57) An object of the present invention is to provide a method and an apparatus for manufacturing a small resin mold integrated circuit device that makes the small resin mold integrated circuit device as a surface mount component smaller, higher in density, and lower in manufacturing cost. A plurality of bare chips (1) are attached and connected to one printed wiring board (4) in a grid pattern in the vertical and horizontal directions, and a potting agent (6) is uniformly filled on the entire upper surfaces of the printed wiring board (4) and the bare chips (1). A plurality of bare chips 1 were entirely embedded in the potting agent 6 to form a single bare chip 1 aggregate, and the bare chip 1 aggregate was cut in the vertical and horizontal directions to cut the bare chips 1 into individual pieces, which were cut into individual pieces. A method and an apparatus for manufacturing a small resin mold integrated circuit device for grinding an outer surface of a bare chip 1.

Inventors

  • 👤 Hajime Kubota
  • 👤 元 久保田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-06 09:01
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/01; H10W72/0198

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