Semiconductor device and manufacturing method thereof

Abstract

Abstract Translated from Japanese (57)【要約】 【課題】 本発明は、コンタクト抵抗を上昇させずに低 抵抗の配線材料による埋め込み配線構造を形成でき、も って、高速動作の実現を図る。 【解決手段】 各電極配線層（２２，２６）としては、 基板（２１）に略垂直な側面部と基板に略平行な側面部 とが互いに異なる材質の拡散障壁層（２９，３０）に接 しており、また、コンタクトホール２４の内部が、電極 配線層と同種の導電性材質（２８）で埋込まれ、この埋 め込まれた導電性材質と電極配線層（２２）との界面に 拡散障壁層が存在しない半導体装置及びその製造方法。 (57) An object of the present invention is to form a buried wiring structure made of a wiring material having a low resistance without increasing contact resistance, thereby achieving high-speed operation. As each electrode wiring layer (22, 26), The side surface portion substantially perpendicular to the substrate (21) and the side surface portion substantially parallel to the substrate are in contact with the diffusion barrier layers (29, 30) made of different materials, and the inside of the contact hole 24 serves as an electrode wiring layer. A semiconductor device embedded with a conductive material (28) of the same kind, wherein a diffusion barrier layer does not exist at the interface between the embedded conductive material and the electrode wiring layer (22), and a manufacturing method thereof.

Inventors

• 👤 Iwao Kunishima
• 👤 巌 國島

Bibliographic Details