← Back to Patent Explorer
JPH08330596A Expired / Lapsed JP ⏱️ 0.0 years remaining

Method for manufacturing thin film transistor

Assignee: Sanyo Electric Co Ltd
•
Filing: 1995-05-31
•
Granted: —
•
Expires: 2015-05-31
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Translated from Japanese (57)【要約】 【目的】 単結晶膜に比べて結晶性に劣ったアモルファ スシリコン膜や多結晶シリコン膜を用いる薄膜トランジ スタの製造方法において、シリコン膜の結晶化とシリコ ン膜中に含まれる不純物の活性化のための熱処理時間を 短縮することを目的とする。 【構成】 単結晶膜に比べて結晶性に劣ったアモルファ スシリコン膜を比較的低温な400℃で成膜した後、温 度600℃、時間75hrで熱処理して、シリコン膜の 結晶化と活性化とを同時におこなう薄膜トランジスタの 製造方法とする。 (57) [Abstract] [Purpose] In a method of manufacturing a thin film transistor using an amorphous silicon film or a polycrystalline silicon film, which is inferior in crystallinity to a single crystal film, crystallization of a silicon film and impurities contained in the silicon film The purpose is to shorten the heat treatment time for activation. [Structure] An amorphous silicon film, which is inferior in crystallinity to a single crystal film, is formed at a relatively low temperature of 400 ° C. and then heat-treated at a temperature of 600 ° C. for 75 hours to crystallize and activate the silicon film. And a method of manufacturing a thin film transistor in which the above steps are performed simultaneously.

Inventors

  • 👤 Naoya Sotani
  • 👤 直哉 曽谷
  • 👤 Hiroyoshi Hamada
  • 👤 弘喜 浜田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-09 03:55
CPC Classifications
—

Claims Analysis

Total Claims: 0
No claims parsed yet. Click Sync Now above to re-index claims from Google Patents.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag